With the rapid development of semiconductor technology, semiconductor devices have been developed towards having a higher device density and a higher integration level, and the dimension of the gate structures in planar transistors has become shorter and shorter. As the dimension of the gate structures is reduced, the ability of conventional planar transistors in controlling channel current is degraded, which causes the short-channel effects (SCEs) and leads to leakage currents. As a result, the electrical performance of the semiconductor devices may be affected.
In order to overcome the SCE of transistors and suppress the leakage currents, fin field-effect transistors (Fin-FETs) are widely used. The Fin-FET is a multi-gate device, and the structure of the Fin-FET includes a fin structure and a dielectric layer formed on the surface of the semiconductor substrate. The dielectric layer covers a portion of the sidewall surface of the fin structure, and the top surface of the dielectric layer is lower than the top surface of the fin structure. The structure of the Fin-FET also includes a gate structure formed on the dielectric layer and also covers the top and the sidewall surfaces of the fin structure. The structure of the Fin-FET further includes a source region and a drain region formed in the fin structure on the two sides of the gate structure, respectively.
In a conventional planar transistor, a large amount of heat generated in the channel region is dispersed laterally, and thus the heat dispersed into the substrate may be limited. However, in a Fin-FET, due to lateral thermal insulation, more heat may be dispersed into the substrate, which causes the local temperature to be overly high, and thus affects the stability of the device. In the meantime, because emission of hot electrons occurs in the drain region, the self-heating effect occurring in the drain region of the Fin-FET may be more severe than the self-heating effect occurring in the source region. The heat generated in the drain region may be dispersed into the substrate as well as other portion of the fin structures, resulting in an increase in the local temperature of the transistor. In particular, as the density of semiconductor devices increases and the dimension of semiconductor devices decreases, the self-heating effect becomes more serious. Therefore, the electrical performance of the formed Fin-FET may be degraded, and the reliability may be reduced.
The disclosed semiconductor devices and fabrication methods thereof are directed to solve one or more problems set forth above and other problems in the art.